1. Field of the Invention
The present invention relates to a compact electronic apparatus such as an electronic calculator and a method for manufacturing the same.
2. Description of the Related Art
Recently, the prices of compact electronic calculators are decreasing since an arithmetic circuit, a display driver, circuit and a CPU can be formed on one chip. Therefore, in order to further reduce cost, IC pellets must be directly bonded to wiring boards (wireless bonding). Note that the "IC pellet" means an individual chip diced from a wafer, and is distinguished from an IC chip having external connection leads bonded by wire leads. U.S. Pat. No. 4,104,728 discloses such a technique. An IC chip in this specification has the same meaning as the IC pellet of this invention, and will be referred to as an IC pellet hereinafter.
More specifically, U.S. Pat. No. 4,104,728 discloses a technique for face-down bonding IC pellet 144 to wiring patterns 30 formed on flexible substrate 14 in FIG. 6 of this patent. In this case, electrodes of IC pellet 144 have a small pitch and a small width. Therefore, wiring patterns 30 require high-precision etching. However, wiring patterns 30 have a large area, since they have key contact patterns 142. For this reason, high-precision etching of the entire wiring patterns results in economical demerit and low yield. Furthermore, positioning between the electrodes of the IC pellet and wiring patterns 30 is difficult, and many defective products are manufactured. As a more important problem, as shown in FIG. 6 of this USP, since wiring patterns 30 are downward inclined toward substrate 14 by face down bonding, an edge portion of IC pellet 144 is brought into contact with the inclined portions of wiring patterns 30, and there is a high possibility of short-circuiting an internal circuit of the IC pellet. FIGS. 7 to 11 of the above USP show embodiments for eliminating the economical demerit caused by the large area of wiring patterns 30. In these embodiments, after an IC pellet is bonded to wiring patterns formed on a daughter board having a small area, the wiring patterns on the daughter board are bonded to a mother pattern. However, since this bonding is achieved by a solder or a conductive adhesive, it must be performed without short-circuiting adjacent wiring patterns, resulting in inefficiency. U.S. Pat. No. 4,113,981 discloses a bonding technique using an anisotropically electrical conductive adhesive (FIG. 7). Since the anisotropically electrical conductive adhesive has conductivity along only its thickness direction, there is a low possibility of short-circuiting adjacent wiring patterns, resulting in convenience. However, an IC chip disclosed in this patent requires higher cost than an IC pellet described in this invention. Furthermore, since a gap is formed between leads of an IC chip, the leads of the IC chip cannot be easily bonded by the anisotropically electrical conductive adhesive, and a sufficient bonding strength cannot be obtained. An IC pellet may be directly face-down bonded to wiring patterns. However, since the electrodes of the IC pellet have a very small pitch and width, if no conductive particles contained in the adhesive are interposed between an electrode and a corresponding wiring pattern, the wiring patterns may not be conducted. If the conductive particles gather between specific adjacent wiring patterns, these adjacent wiring patterns may be short-circuited. For these reasons, mass-production of the apparatus is prevented.